Semiconductor devices having a plurality of signal input/output connection ports (hereinafter also referred to simply as “connection ports”) have been known in the art (see, e.g., JP-A-2002-237574). These connection ports are interconnected by a transmission line and allow connection with external circuitry. In the semiconductor device disclosed in the above patent publication, each connection port includes a signal pad and ground pads. These pads are also used as probe pads contacted, or probed, by an inspection probe when the semiconductor device is inspected.
In conventional methods for inspecting such a semiconductor device, each of the plurality of signal input/output connection ports is contacted, or probed, by an inspection probe. For example, in the case of inspecting the transmission path between two connection ports, each connection port is contacted by an inspection probe, and electrical characteristics of the transmission path are measured both when electrical conduction between these connection ports is established and when it is prevented. (This inspection method is hereinafter also referred to simply as the “2-port measurement.”) when the transmission path between one pair of ports has been inspected, another pair of ports are contacted by the inspection probes and the transmission path between these ports is inspected in the same manner.
Other conventional art includes JP-A Nos. 2000-188501, 2002-033602, 11-186803 (1999), and 2002-237574.
The above conventional inspection methods require a number of 2-port measurements corresponding to the number of connection ports to be probed; that is, the more connection ports to be inspected, the more times the measuring system must be reset and calibrated, resulting increased inspection time.